Converter Models

This section presents the modelling of all matrix converter system. Thus, this section complements the block diagram shown in Figure 4.1, which also contains a modulator in addition to the circuit models. Depending on the converter and simulation program, different modulator models were applied. In all modulator models, the parameters used in the simulations are the same as in the prototype implementations, which are presented in Chapter 5, and they are identical in both the DMC models and the IMC models. All modulator models considered here are based on the CSVM presented in Section 3.3. In all cases, the modulation period Tm is 200 μs, i.e. the modulation frequency is 5 kHz. The modulator is updated twice in Tm, i.e. the duty cycles are updated in the beginning and in the middle of a modulation period, as presented in Tables 3.2–3.4. Thus, the calculation time TC (= Tm /2) is 100 μs. Due to the different main circuits, the structures of the modulators are different in the DMC and IMC models. This also holds for the modulator implementations in the prototypes, as described in Chapter 5.

4.2.1 Models of Direct Matrix Converter

The block diagram of the basic DMC simulation model in Simplorer environment is presented in Figure 4.7 [P3]. The system presented in the block diagram represents the implementation of the CSVM presented in Section 3.3. The same holds for the basic DMC simulation model in Matlab Simulink presented in Figure 4.8 [P2], [P4], [P6]–[P7]. Thus, the basics of the block diagrams in Figures 4.7 and 4.8 are similar. Modulation index m is determined with (3.3-19).

The angle of output voltage reference uo,ref inside the sector θ^o is determined after the sector of the output voltage reference is determined using the absolute angle of uo,ref. The angle of input current reference inside the sector θⁱ is determined after the sector of the input reference angle θ^swi has been determined. The exception is that θ^swi is not defined in the simulations using the PLL-based system, as presented in Section 3.3.3, but rather by using directly the supply voltage fundamental component, which is easily available in the simulation models. Thus, the resulting θ^swi is identical to what the PLL-based system would yield, even with distorted supply voltages. The angles θ^(o,i) and the modulation index m are used in calculating the duty cycle, i.e. in determining u((γ,δ)(κ,λ),0), following (3.3-16). Sector numbers of the output and input reference vectors, i.e. ‘Sector information’, are used to define the pulse pattern according to the CSVM, which is presented in Tables 3.2–3.4.

Output voltage reference and supply voltage

Modulation index, reference vector sectors

and angles determination Duty cycle calculation

Pulse pattern

determination Synthesis of duty cycles and pulse pattern

Figure 4.7 Block diagram of basic DMC Simplorer model.

Output voltage reference and supply voltage

Modulation index, reference vector sectors

and angles determination Duty cycle calculation

Synthesis of duty cycles

Figure 4.8 Block diagram of basic DMC Matlab Simulink model.

In the Simplorer model (Figure 4.7), the pulse pattern determination produces five switching state vectors swo(1,2,3,4,5), which are combined with duty cycles according to the sector information. That determines the switching state number for each instant. This number defines the switching state of each output phase group. These phase state signals are the basis for the generation of gate control voltages uS(A,B,C)(a,b,c)(1,2).

The coding system used in the Simulink model (Figure 4.8) and in the DMC prototype implementation is presented in Appendix B. The synthesis of the duty cycles and phase state coding system produces the switching state signals sw(A,B,C)(a,b,c), which are then used as switches to connect the correct input voltage to each output phase and to connect the correct output current to each input phase, as in [P2] and [P7]. The main circuit part of the Simulink model (Figure 4.8) can also be implemented in Simplorer using the component-based main circuit, as in [P4] and [P6]. In that case, the switching state signals sw(A,B,C)(a,b,c) in Figure 4.8 are to be transformed to gate control voltages uS(A,B,C)(a,b,c)(1,2), as in Figure 4.7.

Matrix Converter Modelling 53

4.2.2 Models of Indirect Matrix Converter

The block diagram of the basic IMC simulation model in Simplorer environment is presented in Figure 4.9 [P3]. The block diagram of the basic IMC simulation model in Matlab Simulink environment is presented in Figure 4.10 [P4], [P6]–[P7]. Both systems presented represent the implementation of the CSVM presented in Section 3.3. The similarity between the DMC and IMC block diagrams in Figures 4.7–4.10 is obvious. The only differences compared to what presented in Section 4.2.1 for the DMC are those related to how the gate control signals are generated. The control signals of the ISB and the ILB are separated in the synthesis of pulse pattern and duty cycles. Thus, the two-stage structure decreases the number of intermediate blocks both in the Simplorer and Simulink models compared with the DMC models.

u_o,ref

and angles determination Duty cycle calculation

Synthesis of duty cycles

Figure 4.9 Block diagram of basic IMC Simplorer model.

u_o,ref

and angles determination Duty cycle calculation

ISB switching state

Figure 4.10 Block diagram of basic IMC Matlab Simulink model.

As with the DMC, the main circuit of the IMC Simulink model can also be in the Simplorer model using the component-based main circuit, as in [P4] and [P6]. In that case, the switching state signals sw(A,B,C)(p,n) of the ILB and sw(p,n)(a,b,c) of the ISB in Figure 4.10 must be converted to gate control voltages uS(A,B,C)(p,n) and uS(p,n)(a,b,c)(1,2), respectively, as in Figure 4.9.

The basic Simplorer model of the IMC contains the dc link components presented in Figure 4.5, but they are not included in the IMC Matlab Simulink model.

The feedback control in simulations is applied in [P3] with IMC and in [P7] with the ideal MC model. In both cases, it has been implemented in Matlab Simulink.

4.2.3 Comparison of Simulation Models

Different DMC models were simulated with a three-phase Y-connected RL load consisting of series-connected 20-Ω resistance and 10-mH inductance. Simulated spectra produced by different models are presented in Figures 4.11–4.12, where input-to-output voltage transfer ratio reference υ^ref is 0.8 and output frequency fo is 40 Hz. The spectra are plotted up to 2 kHz with the frequency resolution (fres) of 10 Hz and the total harmonic distortion (THD) is calculated up to 2 kHz, which is the maximum harmonic frequency taken into account in [IEC00]. In this thesis, the THD for a quantity x is defined as shown in [Moh95]:

1 2 1 2

THD X

X X −

= , (4.2-1)

where X is the rms value of x and X1 is the rms value of the fundamental component. In the spectra plots, capital letter A followed by a number denotes the amplitude of the frequency component multiple for frequency resolution fres, e.g. when fres = 10 Hz, A4 denotes the amplitude of 40-Hz component and A5 denotes the amplitude of 50-Hz component.

The Simplorer results with ideal switches are presented in Figure 4.11. The results with the same ideal Simplorer main circuit but with the modulator in Simulink are presented in Figure 4.12. The difference between the spectra in Figures 4.11 and 4.12 is considerable. It is found that the Simplorer modulators produce more distortion than the Simulink modulators.

Simplorer models produces e.g. second harmonics to the quantities and an output voltage fundamental component lower than its reference. With reasonable modulation steps, the situation was not found to improve significantly. The exact reason for this is unknown, but it relates to the different numerical solver algorithms because Simplorer results became more ideal when simulation step was reduced significantly leading to impractical long simulation times. This should be noted when the results of Simplorer-modulator-based models are considered below and in [P3]. The same inaccuracy also exists in the IMC models, the results of which are presented in Figures 4.13–4.14, attained without dc link model. In other words, in the ideal case the results should be identical with the respective DMC results.

With ideal switches, the different modulator models should produce identical results because the IMC dc link in Figure 4.5 is not included in the IMC model. That similarity holds for Simplorer and Simulink models, as can be seen by comparing the results in Figures 4.11 and 4.13 with each other and the results in Figures 4.12 and 4.14 with each other. Thus, it is possible to conclude that the simulations with the same simulation programs are comparable but the results obtained by different programs are not. In addition, the

Simplorer-modulator-Matrix Converter Modelling 55 based simulations give more realistic total THD values even though their frequency distributions differ from real distributions.

Figure 4.11 Simulated spectra of DMC model in Simplorer with the ideal switches, υref = 0.8, f_o = 40 Hz:

(a) output line-to-line voltage u_AB, (b) output current i_A, (c) supply current i_a.

Figure 4.12 Simulated spectra of DMC model where modulator is in Simulink and main circuit in Simplorer with the ideal switches, υ ref = 0.8, f_o = 40 Hz: (a) output line-to-line voltage u_AB, (b) output current i_A, (c) supply current i_a.

Figure 4.13 Simulated spectra of IMC model in Simplorer with the ideal switches and without dc link components, υref = 0.8, f_o = 40 Hz: (a) output line-to-line voltage u_AB, (b) output current i_A, (c) supply current i_a.

Figure 4.14 Simulated spectra of IMC model where modulator is in Simulink and main circuit in Simplorer with the ideal switches and without dc link components, υo,ref = 0.8, f_o = 40 Hz: (a) output line-to-line voltage u_AB, (b) output current i_A, (c) supply current i_a.